SILICON LABORATORIES INTERNATIONAL PTE. LTD.
Posted: November 10, 2025
Job Description
What we’re looking for:
Person will be responsible for DFT Architecture including JTAG functionality, boundary scan, hierarchical scan, at- speed testing, I/ O testing requirements, MBIST and Repair, implement test logic for analog macros. Person should also be responsible to develop firmware driven cost-effective test strategies methodologies with built-in diagnosis capability to enable efficient debugging and fault isolation on ATE. Person should be capable of generate and debug DFT patterns on tester.
Skills you’ll need:
Required Education/Experience:
3-5 years in Industry
Bachelors/MS in Electrical Engineering, or equivalent
Benefits & Perks :
Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.
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